In SystemVerilog, you can control the randomization of class variables using the rand_mode
method. By default, variables declared with the rand
or randc
keywords are randomized when the randomize()
method is called. However, you can disable this randomization behavior for specific variables, so they act as if they were not declared with rand
or randc
.
What is rand_mode
?
The rand_mode
method allows you to enable or disable the randomization of individual variables in a class. It works similarly to the constraint_mode()
method, which disables constraints. A variable with its randomization disabled will not be affected by randomization, and the solver will treat it like a regular variable.
Syntax
You can use rand_mode
either as a task or a function. Here’s how to use it:
- As a task:
class_obj.variable_name.rand_mode(0);
– Disables randomization.class_obj.variable_name.rand_mode(1);
– Enables randomization.
- As a function:
status = class_obj.variable_name.rand_mode();
– Returns the current state of the variable’s randomization. (1
for enabled,0
for disabled)
Note that rand_mode
is a built-in method and cannot be overridden.
Example: Disabling Randomization for a Variable
Let’s see how rand_mode
works in practice with a simple class that has random variables.
Without Using rand_mode()
By default, all variables declared with rand
or randc
are randomized. Here’s an example without disabling randomization:
class Fruits;
rand bit [3:0] var1; // Declare a random 4-bit variable
rand bit [1:0] var2; // Declare a random 2-bit variable
endclass
module tb;
initial begin
Fruits f = new(); // Instantiate an object of the class
// Display values before randomization
$display("Before randomization var1=%0d var2=%0d", f.var1, f.var2);
// Check if randomization is enabled for both variables
if (f.var1.rand_mode())
if (f.var2.rand_mode())
$display("Randomization of all variables enabled");
// Randomize the variables
f.randomize();
// Display values after randomization
$display("After randomization var1=%0d var2=%0d", f.var1, f.var2);
end
endmodule
Simulation Log:
Before randomization var1=0 var2=0
Randomization of all variables enabled
After randomization var1=15 var2=3
In this example, both variables var1
and var2
are randomized, and their values change after calling randomize()
.
Disabling Randomization for One Variable
Now, let’s disable the randomization for var1
using rand_mode()
:
class Fruits;
rand bit [3:0] var1; // Declare a random 4-bit variable
rand bit [1:0] var2; // Declare a random 2-bit variable
endclass
module tb;
initial begin
Fruits f = new();
$display("Before randomization var1=%0d var2=%0d", f.var1, f.var2);
// Disable randomization for var1
f.var1.rand_mode(0);
// Display if randomization is enabled or disabled for var1
if (f.var1.rand_mode())
$display("Randomization of var1 enabled");
else
$display("Randomization of var1 disabled");
// Randomize the variables
f.randomize();
// Display values after randomization
$display("After randomization var1=%0d var2=%0d", f.var1, f.var2);
end
endmodule
Simulation Log:
Before randomization var1=0 var2=0
Randomization of var1 disabled
After randomization var1=0 var2=3
In this example, var1
is not randomized because we disabled its randomization using rand_mode(0)
. var2
is still randomized, and its value changes as expected.
Disabling Randomization for All Variables
You can also disable randomization for all variables in the class by calling rand_mode(0)
on the class object. Here’s an example:
class Fruits;
rand bit [3:0] var1; // Declare a random 4-bit variable
rand bit [1:0] var2; // Declare a random 2-bit variable
endclass
module tb;
initial begin
Fruits f = new();
$display("Before randomization var1=%0d var2=%0d", f.var1, f.var2);
// Disable randomization for all variables
f.rand_mode(0);
// Check if randomization is disabled for both variables
if (!f.var1.rand_mode())
if (!f.var2.rand_mode())
$display("Randomization of all variables disabled");
// Randomize the variables
f.randomize();
// Display values after randomization
$display("After randomization var1=%0d var2=%0d", f.var1, f.var2);
end
endmodule
Simulation Log:
Before randomization var1=0 var2=0
Randomization of all variables disabled
After randomization var1=0 var2=0
In this case, because we disabled randomization for both variables using f.rand_mode(0)
, neither var1
nor var2
is randomized, and their values remain unchanged.
Error Handling: Invalid rand_mode
Call
If you try to call rand_mode()
on a variable that doesn’t exist in the class, you’ll encounter a compiler error. For example:
module tb;
initial begin
Fruits f = new();
f.c_does_not_exist.rand_mode(1); // This will cause a compiler error
end
endmodule
Simulation Log:
f.c_does_not_exist.rand_mode(1);
|
ncvlog: *E,NOTCLM (testbench.sv,11|21): c_does_not_exist is not a class item.
In this case, trying to access a non-existent variable c_does_not_exist
triggers an error, as it’s not part of the Fruits
class.
Conclusion
The rand_mode
method in SystemVerilog is a powerful tool to control the randomization of class variables. By using it, you can enable or disable randomization for specific variables, giving you better control over the randomization process in your testbenches. Remember that rand_mode
works similarly to constraint_mode()
and ensures that variables are treated as non-random if randomization is disabled.