In SystemVerilog, constraints are enabled by default and are always considered by the constraint solver during randomization. However, you may want to disable specific constraints at times. When a constraint is disabled, it will be ignored during randomization. The method used to enable or disable constraints is called constraint_mode()
.
What is constraint_mode()
?
The constraint_mode()
function allows you to enable or disable constraints. It can be used in two ways:
- As a task: It doesn’t return any value. Instead, it modifies the state of the constraint.
class_obj.const_name.constraint_mode(0);
to turn off the constraint.class_obj.const_name.constraint_mode(1);
to turn on the constraint.
- As a function: It returns the current state of the constraint, either enabled or disabled.
status = class_obj.const_name.constraint_mode();
wherestatus
holds the return value, which indicates whether the constraint is enabled (1) or disabled (0).
Note: The constraint_mode()
method is built-in and cannot be overridden.
constraint_mode()
Method Values:
Value | Meaning | Description |
---|---|---|
0 | OFF | Disables the constraint |
1 | ON | Enables the constraint |
Example: Using constraint_mode()
to Enable/Disable Constraints
Let’s look at an example to understand how constraint_mode()
works with constraints.
class Fruits;
rand bit[3:0] num; // Declare a 4-bit variable that can be randomized
constraint c_num {
num > 4; // Constraint ensures num is greater than 4
num < 9; // Constraint ensures num is less than 9
}
endclass
module tb;
initial begin
Fruits f = new ();
// 1. Print value of num before randomization
$display ("Before randomization num = %0d", f.num);
// 2. Call "constraint_mode" as a function, the return type gives status of constraint
if (f.c_num.constraint_mode ())
$display ("Constraint c_num is enabled");
else
$display ("Constraint c_num is disabled");
// 3. Randomize the class object
f.randomize ();
// 4. Display value of num after randomization
$display ("After randomization num = %0d", f.num);
end
endmodule
Simulation Log:
Before randomization num = 0
Constraint c_num is enabled
After randomization num = 8
In this example, the constraint c_num
is enabled by default, and when randomization occurs, the value of num
is between 4 and 9.
Example: Disabling Constraints Using constraint_mode()
Now, let’s see what happens when we disable the constraint using constraint_mode()
.
module tb;
initial begin
Fruits f = new ();
$display ("Before randomization num = %0d", f.num);
// Disable constraint
f.c_num.constraint_mode(0);
// 3. Check if constraint is disabled
if (f.c_num.constraint_mode ())
$display ("Constraint c_num is enabled");
else
$display ("Constraint c_num is disabled");
// Randomize the variable and display
f.randomize ();
$display ("After randomization num = %0d", f.num);
end
endmodule
Simulation Log:
Before randomization num = 0
Constraint c_num is disabled
After randomization num = 15
Here, we disabled the constraint before randomization. As a result, the solver randomly picks any value for num
, not restricted by the original constraints.
Handling Errors with Non-Existing Constraints
If constraint_mode()
is called on a non-existing constraint, a compiler error will occur. Here’s an example:
module tb;
initial begin
Fruits f = new();
f.c_does_not_exist.constraint_mode(1); // This will cause a compiler error
end
endmodule
Simulation Log:
f.c_does_not_exist.constraint_mode(1);
|
ncvlog: *E,NOTCLM (testbench.sv,11|21): c_does_not_exist is not a class item.
This error occurs because c_does_not_exist
is not a valid constraint in the Fruits
class.
Conclusion
- Constraints are enabled by default in SystemVerilog and are considered during randomization.
- The
constraint_mode()
method helps you enable or disable specific constraints during randomization. - If you disable a constraint, the solver will choose values without considering that constraint.
- Make sure you call
constraint_mode()
only on valid constraints, as trying to call it on non-existing ones will result in an error.
By controlling constraints dynamically with constraint_mode()
, you can have more flexibility over the randomization process in SystemVerilog.
Comparison of Enabling and Disabling Constraints
Action | Constraint Mode Status | Value Chosen by Solver |
---|---|---|
Enable Constraint | ON | Between 4 and 9 |
Disable Constraint | OFF | Any value (e.g., 15) |