Focuses on Gen5/Gen6, Flit Mode, 1b/1b encoding, buffers, handshake phases, and advanced PHY features.

1. PCIe Gen5/Gen6 Physical Layer

• Gen5: 32 GT/s per lane
• Gen6: 64 GT/s per lane
• Uses 1b/1b Flit Mode instead of 128b/130b for high-speed efficiency
• Flit = fixed-size transmission unit
• Requires advanced equalization, scrambling, and alignment mechanisms

ASCII Layer Diagram (Gen6)

Transaction Layer (TLPs)
        |
Data Link Layer (DLLPs)
        |
Flit Mode PHY (1b/1b)
        |
Serial TX/RX lanes (64 GT/s)

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2. Flit Mode Concept

Flit Mode (Flow Control Unit) introduces:

• Fixed-size flits for high-speed transmission
• Implicit and explicit sequence numbers
• Replay buffers for reliability
• Efficient credit-based flow control

Flit Types:

Flit Type	Purpose
Idle	No data, keeps link alive
NOP	Padding, no payload
Payload	Carries actual TLP/DLLP data
Sequence Number	Ensures proper ordering
ACK / NAK	Flow control feedback

ASCII Example:

[Idle] [Payload] [Sequence #] [Payload] [NOP] [ACK]

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3. 1b/1b Encoding

• 1b/1b: Each logical bit is sent as a single physical bit with special alignment
• Reduces overhead vs 128b/130b
• Requires block/flit alignment and symbol placement
• Scrambling still applied to prevent EMI

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4. Transmit and Receive Buffers

• Transmit buffer: stores flits until acknowledged
• Receive buffer: stores incoming flits before passing to DLL
• Flit replay: TX buffer can resend flits if NAK received
• Ensures zero data loss at 64 GT/s speeds

ASCII Flow:

[TX Buffer] -> Transmit Flit -> [RX Buffer] -> DLL -> TL
       ^                             |
       |<------ NAK triggers replay -|

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5. Flit Handshake Phases

Phase	Description
IDLE Flit Handshake	Keeps link ready when no data
Sequence Number Handshake	Syncs sequence numbers between TX/RX
Normal Flit Exchange Phase	Regular payload transfer
Received ACK/NAK/Discard Rules	Process feedback for flow control

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6. Flit Replay Scheduling

• NAKed flits are re-scheduled based on sequence number
• Ensures TLP ordering and reliability
• Flit sequencer numbers used to track TX/RX

ASCII Replay Example:

TX: [Payload 1][Payload 2][Payload 3]
RX: [Payload 1][Payload 3] (Payload 2 NAKed)
Replay: TX sends [Payload 2] again

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7. Alignment at Block/Flit Level

• Flits must be aligned at PHY layer
• Ensures DLL can correctly reconstruct TLPs
• Gray coding and precoding used to improve signal integrity

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8. FEC (Forward Error Correction)

• Adds redundancy to detect/correct errors
• Important at Gen6 speeds for long trace reliability
• Works alongside ACK/NAK replay for extra robustness

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9. Decision Feedback Equalization (DFE)

• Receiver adapts dynamically to channel impairments
• Compensates for loss, crosstalk, and reflections
• Ensures 64 GT/s link stability

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10. Data Stream in Flit Mode

• Combines TLPs and DLLPs into flits
• Flit scheduler determines order, alignment, and replay
• Idle/NOP flits inserted to maintain link timing

ASCII Stream Example:

[Idle] [Payload TLP1] [Payload TLP2] [SEQ#1] [ACK DLLP] [NOP] [Payload TLP3]

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11. Physical Layer Features – Gen6

Feature	Purpose
Flit Sequencer Numbers	Track TLP order
Handshake Phases	Maintain reliable communication
Flit Replay Mechanism	Retransmit lost/corrupted flits
FEC	Forward error correction
Gray Coding / Precoding	Improve signal integrity
Clock Tolerance Compensation	Adjust timing across lanes
Equalization Enhancements	Ensure high-speed reliability
Retimer Support	Extend high-speed links
Alternate Protocol Negotiation	Compatibility with lower-gen devices

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